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FS#4864 — gsw-2-6k: carte 8

Attached to Project— Reseau Internet et Baies
Maintenance
Tout le réseau
CLOSED
100%
c'est la 3ème fois qu'on voit le message d'erreur. c'est le
debut d'une fin. on va programmer le changement de la carte

Nov 18 23:58:48 GMT: %EARL-DFC8-2-SWITCH_BUS_IDLE: Switching bus is idle for 5 seconds. The card grant is 0
Nov 18 23:59:33 GMT: %EARL-DFC8-2-SWITCH_BUS_IDLE: Switching bus is idle for 5 seconds. The card grant is 0
Nov 22 13:05:39 GMT: %EARL-DFC8-2-SWITCH_BUS_IDLE: Switching bus is idle for 5 seconds. The card grant is 0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x2C] JA_DR_RI_0_CPU_FIFO_264_16_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x6B] JA_DR_RI_1_CPU_FIFO_264_16_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x46] JA_DR_RI_0_STA_FCO = 0x3
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x85] JA_DR_RI_1_STA_FCO = 0x3
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0xC8] JA_DR_RW_STA_PB_FC = 0xF
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0xC9] JA_DR_RW_STA_LO_FULLNESS_0 = 0xB9
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0xCA] JA_DR_RW_STA_HI_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0xCB] JA_DR_RW_STA_LO_FULLNESS_1 = 0xB6
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0xCC] JA_DR_RW_STA_HI_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x150] JA_DT_FD_TXPB_FULLNESS_HI = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x151] JA_DT_FD_TXPB_FULLNESS_LO = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x28A] JA_FI_FT_RCV_RATE_SEL = 0xC
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x261] JA_FI_FR_HI_FULLNESS_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x262] JA_FI_FR_LO_FULLNESS_A = 0x3BA
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x263] JA_FI_FR_HI_FULLNESS_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x264] JA_FI_FR_LO_FULLNESS_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x289] JA_FI_FT_XMIT_SHAPE = 0xFFF
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x283] JA_FI_FT_HI_FULL_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x284] JA_FI_FT_LO_FULL_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x285] JA_FI_FT_HI_FULL_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x286] JA_FI_FT_LO_FULL_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x348] JA_TI_PR_RPT_HI_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x349] JA_TI_PR_RPT_LO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x462] JA_AG_DI_MACN_0_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x463] JA_AG_DI_MACN_1_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x489] JA_AG_DS_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x48A] JA_AG_DS_RAM_FULLNESS_1 = 0xA
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x48B] JA_AG_DS_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x48C] JA_AG_DS_RAM_FULLNESS_3 = 0x19
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4CB] JA_AG_PM_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4CC] JA_AG_PM_RAM_FULLNESS_1 = 0x101
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4CD] JA_AG_PM_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4CE] JA_AG_PM_RAM_FULLNESS_3 = 0x101
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4F1] JA_AG_RM_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4F2] JA_AG_RM_RAM_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4F3] JA_AG_RM_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x4F4] JA_AG_RM_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x502] JA_AG_RS_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x503] JA_AG_RS_RAM_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x504] JA_AG_RS_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x505] JA_AG_RS_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x50C] JA_EI_DQ_SF_FIFO_CMT_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x50D] JA_EI_DQ_SF_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x55D] JA_EI_RG_STA_FM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x55E] JA_EI_RG_STA_FM_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x573] JA_EI_SR_125_STA_E_RSLT_FIFO_FULLNESS = 0x27
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x594] JA_EI_SR_78_STA_MAPPING_FIFO_FULLNESS = 0x23
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x599] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x59A] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x59B] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x59C] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5A6] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5A7] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_1 = 0xA
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5A8] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5A9] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_3 = 0x19
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5B3] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5B4] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5B5] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5B6] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5F6] JA_TM_HI_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [0:0x5F7] JA_TM_LO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x2C] JA_DR_RI_0_CPU_FIFO_264_16_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x6B] JA_DR_RI_1_CPU_FIFO_264_16_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x46] JA_DR_RI_0_STA_FCO = 0x3
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x85] JA_DR_RI_1_STA_FCO = 0x3
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0xC8] JA_DR_RW_STA_PB_FC = 0xF
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0xC9] JA_DR_RW_STA_LO_FULLNESS_0 = 0xB7
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0xCA] JA_DR_RW_STA_HI_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0xCB] JA_DR_RW_STA_LO_FULLNESS_1 = 0xB9
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0xCC] JA_DR_RW_STA_HI_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x150] JA_DT_FD_TXPB_FULLNESS_HI = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x151] JA_DT_FD_TXPB_FULLNESS_LO = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x28A] JA_FI_FT_RCV_RATE_SEL = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x261] JA_FI_FR_HI_FULLNESS_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x262] JA_FI_FR_LO_FULLNESS_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x263] JA_FI_FR_HI_FULLNESS_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x264] JA_FI_FR_LO_FULLNESS_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x289] JA_FI_FT_XMIT_SHAPE = 0xFC7
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x283] JA_FI_FT_HI_FULL_A = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x284] JA_FI_FT_LO_FULL_A = 0x392
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x285] JA_FI_FT_HI_FULL_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x286] JA_FI_FT_LO_FULL_B = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x348] JA_TI_PR_RPT_HI_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x349] JA_TI_PR_RPT_LO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x462] JA_AG_DI_MACN_0_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x463] JA_AG_DI_MACN_1_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x489] JA_AG_DS_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x48A] JA_AG_DS_RAM_FULLNESS_1 = 0x4
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x48B] JA_AG_DS_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x48C] JA_AG_DS_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4CB] JA_AG_PM_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4CC] JA_AG_PM_RAM_FULLNESS_1 = 0xF
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4CD] JA_AG_PM_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4CE] JA_AG_PM_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4F1] JA_AG_RM_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4F2] JA_AG_RM_RAM_FULLNESS_1 = 0x4
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4F3] JA_AG_RM_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x4F4] JA_AG_RM_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x502] JA_AG_RS_RAM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x503] JA_AG_RS_RAM_FULLNESS_1 = 0x4
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x504] JA_AG_RS_RAM_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x505] JA_AG_RS_RAM_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x50C] JA_EI_DQ_SF_FIFO_CMT_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x50D] JA_EI_DQ_SF_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x55D] JA_EI_RG_STA_FM_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x55E] JA_EI_RG_STA_FM_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x573] JA_EI_SR_125_STA_E_RSLT_FIFO_FULLNESS = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x594] JA_EI_SR_78_STA_MAPPING_FIFO_FULLNESS = 0x1
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x599] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x59A] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x59B] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x59C] JA_EI_TX_STA_LR_DYN_FIFO_FULLNESS_3 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5A6] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5A7] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_1 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5A8] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:39 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5A9] JA_EI_TX_STA_MO_DYN_FIFO_FULLNESS_3 = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5B3] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_0 = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5B4] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_1 = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5B5] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_2 = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5B6] JA_EI_TX_STA_CT_DYN_FIFO_FULLNESS_3 = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5F6] JA_TM_HI_FULLNESS = 0x0
Nov 22 13:05:40 GMT: %PF_ASIC-DFC8-3-ASIC_DUMP: [1:0x5F7] JA_TM_LO_FULLNESS = 0x0

Date:  Tuesday, 23 November 2010, 11:07AM
Reason for closing:  Done
Additional comments about closing:  La carte a été remplacée.
Comment by OVH - Monday, 22 November 2010, 15:52PM

Remplacement de la carte prévu demain matin (23/11) à 10h. Pas d'impact sur le trafic, tous les liens connectés sur cette carte étant redondés.


Comment by OVH - Tuesday, 23 November 2010, 10:55AM

Nous démarrons l'intervention.